Characterization, Conducted Immunity

Scope:

The methods included in this document are: a. Voltage-Temperature Design Margins. b. Voltage Interruptions and Transients. c. Voltage Dropouts and Dips. d. Current Draw Under a Number of Conditions. e. Switch Input Noise These methods are best applied during the Development stage but can be used at all stages (e.g., Pre-Qualification, Qualification or Conformity).

Rationale:

This revision includes corrections, clarifications and simplifications from July 2007 version, deletion of some tests (transient B1, B2) and addition of transient A2-a and reference to new version of SAE J1211.

History:
Standard Published Revision Status
J2628_201307 2013-07-16 Latest Revised
2007-07-19 Historical Revised
2005-04-29 Historical Revised
2002-08-05 Historical Issued
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