The methods included in this document are: a. Voltage-Temperature Design Margins. b. Voltage Interruptions and Transients. c. Voltage Dropouts and Dips. d. Current Draw Under a Number of Conditions. e. Switch Input Noise These methods are best applied during the Development stage but can be used at all stages (e.g., Pre-Qualification, Qualification or Conformity).
This revision includes corrections, clarifications and simplifications from July 2007 version, deletion of some tests (transient B1, B2) and addition of transient A2-a and reference to new version of SAE J1211.