Netlist Assurance Test Methods exist to assess microcircuit designs for maliciously added, removed, or modified functions detrimental to system operation. In the context of the Microcircuit fabrication design process, these methods will be used to analyze a computer aided design (CAD) representation of the microcircuit. The Netlist Assurance Test Methods discover vulnerabilities, undisclosed functions (e.g. "kill switch", paths to leak passwords, or triggers of malicious activity) and changes from the original specifications of the devices. These methods are intended to be used with standard verification methods that the implemented design has remained unchanged through the many transformations in the design flow.
This standard was created in response to a significant and increasing volume of Suspect/Counterfeit (SC) Electrical, Electronic, and Electromechanical (EEE) parts entering the aerospace supply chain, posing significant performance, reliability, and safety risks. This standard is intended to provide guidance, practices and methods for evaluating vulnerabilities in microelectronic parts in order to mitigate the risks of receiving or using SC EEE parts. The Netlist Assurance test method aims to assess vulnerabilities of an implemented design netlist in a microcircuit.